Title page for etd-1024114-144813


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URN etd-1024114-144813
Author Tsung-Yu Hsieh
Author's Email Address No Public.
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Department Electrical Engineering
Year 2014
Semester 1
Degree Master
Type of Document
Language zh-TW.Big5 Chinese
Title A Circuit-Level Decoupling Principle Based Discontinuous Pulse Width Modulation Strategy for Three Level Neutral-Point-Clamped Inverter
Date of Defense 2014-09-09
Page Count 71
Keyword
  • Discontinuous Pulse Width Modulation Strategy
  • Neutral-Point Voltage Balancing Control
  • Three Level Neutral-Point-Clamped Inverter
  • Zero-Sequence Voltage
  • Circuit-Level Decoupling Principle
  • Abstract Multilevel inverter technology has emerged recently as a very important alternative in the area of medium-voltage (2.3, 3.3, 4.16, and 6.9 kv) energy control. The three level neutral-point-clamped (NPC) inverter is the most extensively applied multilevel inverter topology in this area. Based on the circuit-level decoupling principle, the implementation of modulation scheme can be significantly simplified in every defined operating section through deriving the zero-sequence voltage with assuming balanced neutral-point voltage. This thesis presents a carrier-based discontinuous pulse width modulation (DPWM) strategy with zero-sequence voltage injection and neutral-point voltage balancing control for the three level NPC inverter. The proposed DPWM strategy not only takes advantage of low voltage harmonic distortion, but also reduces the switching loss of the inverter. Finally, the viability and performance of the proposed DPWM strategy are verified in the laboratory prototype.
    Advisory Committee
  • Perng, Jau-Woei - chair
  • Shiang-Hwua Yu - co-chair
  • Tzung-Lin Lee - advisor
  • Files
  • etd-1024114-144813.pdf
  • Indicate in-campus at 5 year and off-campus access at 99 year.
    Date of Submission 2014-11-24

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