Title page for etd-1015113-190908


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URN etd-1015113-190908
Author Cheng-Ta Wu
Author's Email Address No Public.
Statistics This thesis had been viewed 5348 times. Download 534 times.
Department Computer Science and Engineering
Year 2013
Semester 1
Degree Master
Type of Document
Language zh-TW.Big5 Chinese
Title SoC Integration and Verification of an AXI-Based 3D Graphics OpenGL ES2.0 SoC
Date of Defense 2013-10-25
Page Count 173
Keyword
  • BUS
  • AXI
  • AHB
  • Verification
  • OpenGL ES2.0
  • Integration
  • Abstract Nowadays, due to improvement of fabrication and IP design technology, the design complexity of System on Chip is increasing very fast. Thus we need huge amount of test pattern to verify the SOC, so how to verify the system effectively is very important. In this thesis, we take the 3DG OpenGL ES2.0 SoC which was developed by our 3DG design group as example, introducing how to build a verification platform with unified method through each level from System Modeling Level to FPGA Emulation Level. Furthermore, we use the automatic verification mechanism to improve the effectiveness of the test pattern and correctness of comparison results. And in order to improve the performance of 3DG OpenGL ES2.0 SoC, we change the original adopted AHB system bus into high performance AXI system bus. We use coreConsultant (developed by Synopsys) to generate the related IP modules, so we can save development and verification time of modules under AXI environment, and we will also introduce the flow of IP generation and synthesis in this thesis.
    Advisory Committee
  • Kuen-Jong Lee - chair
  • Yun-Nan Chang - co-chair
  • Chris Lee - co-chair
  • Ing-Jer Huang - advisor
  • Files
  • etd-1015113-190908.pdf
  • Indicate in-campus at 2 year and off-campus access at 2 year.
    Date of Submission 2013-11-15

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