Title page for etd-0906111-035109


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URN etd-0906111-035109
Author Chia-Yu Yeh
Author's Email Address chiayu@garfield.cse.nsysu.edu.tw
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Department Computer Science and Engineering
Year 2010
Semester 2
Degree Master
Type of Document
Language zh-TW.Big5 Chinese
Title Design of a Multi-Core Multi-thread Floating-Point Processor and Its Application in Computer Graphics
Date of Defense 2011-07-25
Page Count 115
Keyword
  • multi-threading
  • graphics processing unit (GPU)
  • vertex shader
  • SIMD
  • matrix-vector multiplication
  • OpenGL ES 2.0
  • Abstract Graphics processing unit (GPU) designs usually adopts various computer architecture techniques to boost the computation speed, including single-instruction multiple data (SIMD), very-long-instruction word (VLIW), multi-threading, and/or multi-core. In OpenGL ES 2.0, user programmable vertex shader (VS) hardware unit can be designed using vectored SIMD computation unit so that it can efficiently compute the matrix-vector multiplication, one of the key operations in vertex transformation. Recently, high-performance GPU, such as Telsa series from nVidia, is designed with many-core architectures with each core responsible for scalar operations. The intention is to allow for efficient execution of general-purpose computations in addition to the specialized graphics computations. In this thesis, we design a scalar-based multi-threaded GPU design that is composed of four scalar processors, one special-function unit, and can execute multi-threaded instructions. We use the example of vertex transformation to demonstrate execution efficiency of the scalar-based multi-threaded GPU. We also make comparison with the vector-based SIMD GPU.
    Advisory Committee
  • Chung-Ho Chen - chair
  • Yun-Nan Chang - co-chair
  • Shiann-Rong Kuang - co-chair
  • Ming-Chih Chen - co-chair
  • Shen-Fu Hsiao - advisor
  • Files
  • etd-0906111-035109.pdf
  • Indicate in-campus at 5 year and off-campus access at 5 year.
    Date of Submission 2011-09-06

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