Title page for etd-0830110-152704


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URN etd-0830110-152704
Author Cheng-Hsuan Tsai
Author's Email Address No Public.
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Department Computer Science and Engineering
Year 2009
Semester 2
Degree Master
Type of Document
Language zh-TW.Big5 Chinese
Title Design of Hybrid CMOS/Pass-Transistor-Logic Standard Cell Library
Date of Defense 2010-07-14
Page Count 76
Keyword
  • CMOS logic
  • Logic Synthesizer
  • Standard Cell Library
  • ASIC Design Flow
  • Pass-Transition-Logic(PTL)
  • Abstract The mainstream of current VLSI design and logic synthesis is based on traditional CMOS logic circuits. However, various new logic circuit design styles based on pass-transistor logic (PTL) have been proposed. The advantage of PTL is higher speed, smaller area and lower power for some particular circuits such as XOR. Since most current automatic logic synthesis tools (such as Synopsys Design Compiler) are based on conventional CMOS standard cell library, the corresponding logic minimization for CMOS logic cannot be directly employed to generate efficient PTL circuits. In this thesis, we develop a novel PTL synthesizer that can efficiently generate PTL-based circuits. We proposed a new synthesis method (hybrid PTL/CMOS Library design) that has multiple driving strengths and multiple threshold voltages to achieve better performance in area, speed, and power. Since PTL-based circuits are constructed by only a few basic PTL cells, the layouts in PTL cells can be easily updated as the process technology migrates rapidly in current Nano technology era. The proposed PTL logic synthesis flow employs the popular Synopsys Design Compiler (DC) to perform logic translation and minimization based on the standard cell library composed of PTL and CMOS logic cells. Thus, the PTL design flow can be easily embedded in the standard cell-based ASIC design flow.
    Advisory Committee
  • Chuen-Yau Chen - chair
  • Tso-Bing Juang - co-chair
  • Shiann-Rong Kuang - co-chair
  • Shen-Fu Hsiao - advisor
  • Files
  • etd-0830110-152704.pdf
  • indicate accessible in a year
    Date of Submission 2010-08-30

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