Title page for etd-0814117-172335


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URN etd-0814117-172335
Author Chun-Kai Liao
Author's Email Address No Public.
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Department Computer Science and Engineering
Year 2017
Semester 1
Degree Master
Type of Document
Language zh-TW.Big5 Chinese
Title A Fast Locked Phase Locked Loop with a Bootstrapped Switch Controlled Operational Transconductor Amplifier
Date of Defense 2017-09-14
Page Count 62
Keyword
  • PLL
  • Controllable OTA
  • VCO
  • Charge Pump
  • PFD
  • Bootstrapped Switch
  • Abstract The proposed PLL in this thesis is implemented in TSMC 90nm 1P9M RF technology with a 1V supply voltage. This thesis presents a wide tuning and fast locking CMOS integer-N frequency synthesizer. The synthesizer is mainly used for IEEE 802.11ac unlicensed band of Wi-Fi (Wireless Fidelity). It provides one ration frequency ranged from 4.243GHz to 5.202GHz for the local oscillator in RF front-end circuits. The proposed frequency synthesizer contains a Phase / Frequency Detector, a Low Pass Filter , Comparator, Controllable Operational Transconductance Amplifier, a Charge Pump, a Voltage Control Oscillator, Bootstrapped Switch, Non-overlapping Circuit, Up/Down Counter, and a Pulse-Swallow Divider. 
    In order to speed up the lock time, the synthesizer increased the value of gm and the current injection into the LPF by comparing the V_ctrl and change the digital control code of C-OTA.
    The simulation result of the synthesizer is shown that the power dissipation is 9.48mW, the output frequency is 4.243GHz~5.202GHz, the lock time is 7.2μs.
    Advisory Committee
  • Shiann-Rong Kuang - chair
  • Xin-Yu Shih - co-chair
  • Ko-Chi Kuo - advisor
  • Files
  • etd-0814117-172335.pdf
  • Indicate in-campus at 5 year and off-campus access at 5 year.
    Date of Submission 2017-09-14

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