|Author's Email Address
||This thesis had been viewed 5351 times. Download 3593 times.|
|Type of Document
||Low-Variation 1 MHz Clock Generator,High Sensitivity Linear Voltage-to-Frequency Converter,and High-PSR Bias Circuit for NTSC SYNC Separation|
|Date of Defense
||NTSC SYNC separation
power supply rejection
||This thesis includes three topics. The first topic is a low-variation 1 MHz clock generator. The second one is a high sensitivity linear voltage-to-frequency converter. The last one is a high-PSR bias circuit for NTSC SYNC separation. All of the circuits can be applied to related consumer electronic products.|
The low-variation 1 MHz clock generator includes a bias circuit which automatically compensates the drifting caused by temperature variations. Furthermore, the circuit contains neither BJTs nor diodes to reduce the area cost. The frequency variation is measured to be less than 2.55\% in the range of 0℃~90℃.
The high sensitivity linear voltage-to-frequency converter is mainly constructed by a window comparator. We analyze and improve the performance of accuracy to achieve both high accuracy and high sensitivity. The accuracy error is less than 1% and sensitivity is 84 KHz/V in the voltage range of 0.1V~0.8V.
The high-PSR bias circuit for NTSC SYNC Separation is implemented by a bandgap reference which is controlled by a feedback loop to reduce the interference of the environment. The measurement variation of the bandgap reference is less than 1\% when the variation of power supply is 10\%. The sensitivity of the bandgap reference to temperature is measured to be 0.0006V/℃.
||Sying-Jyan Wang - chair|
Shen-Fu Hsiao - co-chair
Jihching Chiu - co-chair
Chua-Chin Wang - advisor
indicate access worldwide|
|Date of Submission