Title page for etd-0712112-144604


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URN etd-0712112-144604
Author Jun-hong Liu
Author's Email Address No Public.
Statistics This thesis had been viewed 5563 times. Download 827 times.
Department Electrical Engineering
Year 2011
Semester 2
Degree Master
Type of Document
Language English
Title Low-Power Continuous-Time Sigma-Delta Modulator for GSM
Date of Defense 2012-07-06
Page Count 103
Keyword
  • sigma-delta modulator
  • GSM
  • low power consumption
  • low power supply
  • continuous-time
  • Abstract Continuous-time sigma-delta modulator can be applied to wireless communications, photography and MP3 player. Portable electronics products became mainstream the design of a low power consumption analog circuit become important. Therefore, this paper presents a low power consumption continuous-time sigma-delta modulator.
    The low-power continuous-time sigma-delta modulator includes one-bit quantizer and a third-order loop filter consisting of resistor-capacitor integrators. Through the modified Z-transform, the discrete time loop filter design is transformed to the continuous time loop filter design.
    The proposed sigma-delta modulator used TSMC 0.18μm CMOS 1P6M standard process, and its supply voltage is 1V, oversampling ratio is 32, bandwidth is 200 KHz, effective number is 13bit, power consumption is 1.5mW.
    Keywords: GSM, low power consumption, low power supply, continuous-time, sigma-delta modulator.
    Advisory Committee
  • Tzyy-Sheng Horng - chair
  • Ko-Chi Kuo - co-chair
  • Jyi-Tsong Lin - advisor
  • Chia-Hsiung Kao - advisor
  • Files
  • etd-0712112-144604.pdf
  • Indicate in-campus at 0 year and off-campus access at 1 year.
    Date of Submission 2012-07-12

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