Title page for etd-0710101-184930


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URN etd-0710101-184930
Author Huan-Chou Kuo
Author's Email Address m8831661@student.nsysu.edu.tw
Statistics This thesis had been viewed 5562 times. Download 5016 times.
Department Electrical Engineering
Year 2000
Semester 2
Degree Master
Type of Document
Language English
Title Three improved operational amplifiers with low power low voltage
Date of Defense 2001-06-28
Page Count 52
Keyword
  • low power low voltage
  • CMOS operational amplifier
  • rail-to-rail
  • Abstract  Three improved operational amplifiers with low voltage and rail-to-rail constant  are proposed. Two of the amplifiers are modified from the amplifier with a level shifting circuit. One improved amplifier has fewer devices, higher speed, and reduced area and the other improved amplifier is added an additional adjustable gain. The third amplifier is a floating voltage controlled voltage source (FVCVS) amplifier, which has reduced area and improved frequency response.
     The first two level shifting operational amplifiers are designed in a 0.5μm UMC CMOS process. They use about half number of devices. The supply voltage is 1.3V, and the current consumes just only 22.6% of the original circuits. The unity gain frequency increases 56.8%. The slew rate, CMRR and PSRR are higher. The 2nd amplifier still has a rail-to-rail constant gm; however, the gm can be adjusted. The third amplifier uses the 0.35μm UMC CMOS process with 1.2V operating voltage. The gain-bandwidth product is 53.8% larger than the original circuits. No frequency compensation is used and the devices are fewer. The results are obtained in HSPICE simulation.
    Advisory Committee
  • Yao-Tsung Tsai - chair
  • Jyi-Tsong Lin - co-chair
  • Jinn-Shyan Wang - co-chair
  • Chia-Hsiung Kao - advisor
  • Files
  • etd-0710101-184930.pdf
  • indicate accessible in a year
    Date of Submission 2001-07-10

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