Title page for etd-0705115-232159


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URN etd-0705115-232159
Author Yi-Fei Hsieh
Author's Email Address No Public.
Statistics This thesis had been viewed 5566 times. Download 607 times.
Department Electrical Engineering
Year 2014
Semester 2
Degree Master
Type of Document
Language zh-TW.Big5 Chinese
Title SEPIC Converter Design with Power Regulation and Load Compensation
Date of Defense 2015-07-24
Page Count 60
Keyword
  • load compensation
  • power factor correction
  • power regulation
  • ultrasonic transducer
  • inverter
  • SEPIC Converter
  • Abstract A SEPIC converter is designed in combination with an inverter to form a driving circuit of an ultrasonic transducer for the spray coating application. The SEPIC converter provides an adjustable DC output to an H-bridge inverter. By adjusting the DC output level, the output power of the inverter is thereby regulated. Considering the requirement of steady driving power and the possible changes in the transducer impedance, additional driving power feedback control and feedforward load compensation are included in the control scheme of the SEPIC converter, so that the resulting ultrasonic driver can maintain a constant driving power even under load variations. The experimental results confirm that the designed SEPIC converter not only has a high power factor, but also help regulate the driving power under a sudden change in load impedance.
    Advisory Committee
  • Hau-Chen Yen - chair
  • Yao-Ching Hsieh - co-chair
  • Shiang-Hwua Yu - advisor
  • Files
  • etd-0705115-232159.pdf
  • Indicate in-campus at 3 year and off-campus access at 3 year.
    Date of Submission 2015-08-06

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