Title page for etd-0627116-230604


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URN etd-0627116-230604
Author Kuan-Chih Cheng
Author's Email Address No Public.
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Department Electrical Engineering
Year 2015
Semester 2
Degree Master
Type of Document
Language zh-TW.Big5 Chinese
Title A Low-Cost Dependability Evaluation and Grading Method and Its Hardware Implementation for Image Processing Circuits
Date of Defense 2016-06-30
Page Count 71
Keyword
  • dependability
  • error-tolerance
  • quality evaluation
  • FSIMc
  • image processing circuits
  • Abstract Image processing circuits are expected to be widely used in IoT (Internet of Things) and automotive electronics. For these applications, dependability evaluation is critical. In recent years error-tolerance has been proposed as a new way to extend lifetime of chips. The acceptability of errors produced by defective or aged chips are carefully examined, and if there exist only acceptable errors, the chips are likely to be still functional. In this thesis, we focus on the utilizing error-tolerance to evaluate dependability of image processing circuits. By analyzing the acceptability of the generated images to grade target circuits, users can be warned and take proper actions. To evaluate the accuracy of our method, we employ the image quality accessment attribute of FSIMc as basis. FSIMc has been shown to be able to reflect human visual system (HVS) the most accurately among the developed attributes so far. A large number of potential errors that may appear due to wear-out/aging during in-field use of a target system are considered, including sigle/ multiple stuck-at faults and two types of common noises, including Gaussian noises and salt-and-pepper noises. Compared with previous work, our method is easiler to implement and more efficiently evaluate acceptability of images. The experimental results for a large number of erroneous images show that our test method can achieve the accuracy of 96.16%. Moreover, our method is applicable for circuits that output different color formats of images such as gray scale or RGB. We have also implemented the proposed method by hardware. The results show that the hardware can work with the same operating frequency of the commercial JPEG decoder. Thus real-time acceptability evaluation can be achieved. The hardware implementation results also show that the required area overhead is only 5%.
    Advisory Committee
  • Tsung-Chu Huang - chair
  • Jih-ching Chiu - co-chair
  • Shiann-Rong Kuang - co-chair
  • Tong-Yu Hsieh - advisor
  • Files
  • etd-0627116-230604.pdf
  • Indicate in-campus at 5 year and off-campus access at 5 year.
    Date of Submission 2016-07-28

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