Title page for etd-0623109-111336


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URN etd-0623109-111336
Author Chi-Feng Weng
Author's Email Address No Public.
Statistics This thesis had been viewed 5351 times. Download 1672 times.
Department Physics
Year 2008
Semester 2
Degree Ph.D.
Type of Document
Language English
Title Electrical Properties and Reliability of Poly-Si TFTs for System On Panel Application
Date of Defense 2009-06-13
Page Count 161
Keyword
  • TFT
  • Si
  • Poly-Si
  • Reliability
  • Abstract English Abstract
    In this thesis, we investigate the electrical properties and reliabilities of poly-Si TFTs for system on panel application. Roughly, we divide the thesis into two parts, n-type and p-type TFTs respectively. In n-type TFT, we mainly study degradation characteristics of TFTs under dynamic stress. On the other hand, we focus on special negative bias temperature instability (NBTI) degradation for p-type poly-Si TFTs. Because grain boundary in poly-Si film and serious self-heating effect due to glass substrate, which has a poor thermal conductivity, the electrical properties and reliabilities of poly-Si TFTs become more complicated, compare with metal-oxide-semiconductor field effect transistor (MOSFET). Therefore, in the thesis, we found some strange phenomena never observed in a-Si TFT and MOSFET.
     In chapter 3, the degradation mechanism of n-channel poly-silicon thin film transistor (poly-Si TFT) has been investigated at room temperature under dynamic voltage stress, which simulate under high frequency operation as driving devices. The ON-current of TFT is degraded to as low as 0.3 times of the initial value after 1000 second stress. On the other hand, both the sub-threshold swing and threshold voltage kept well during the AC stress. The current crowding effect was rapidly increased with increasing of stress duration. However, comparing the initial and degraded characteristics at rising temperature, namely, 150◦C, the ON-current of TFT only decrease to 75 percent of the initial value after 1000 second AC stress. It depicts that creation of effective trap density in tail-states of poly-Si film is responsible for the electrical degradation of poly-Si TFT. At high temperature, electron has enough energy to pass the energy barrier created by ac stress and the degradation is less obvious.
      In chapter 4, the degradation mechanism of n-channel poly-silicon thin film transistor (poly-Si TFT) has been investigated under dynamic voltage stress, which simulate under low frequency operation as pixel switches. Surprisingly, two totally different degradations of TFTs were observed after dynamic stress. Firstly field-effect mobility and driving current increased during early stress. However, a clear and rapid degradation of field-effect mobility occurred instead during later stress. Additionally, the threshold voltage of stressed TFTs strangely shifted to negative direction in later stress, which was never observed in early stress. Finally, we clarify the degradation mechanisms for early and later stress respectively by varied temperature experiments.
    In chapter 5, the characteristics of p-type poly-silicon thin film transistor (poly-Si TFT) with dynamic bias stress were investigated. The AC stress is operated with the constant drain voltage (15V) and the varying gate voltage (0V~-15V) to degrade the devices. There are some phenomena which cannot be completely explained by typical NBTI mechanism in the experiment. In addition to NBTI, we suggest that the self-heating effect might be involved, because the self-heating effect could rise channel temperature and cause the dissociation of the Si-H bonds at the poly-Si/SiO2 interface due to the Joule heating. The released hydrogen reacts with SiO2 and causes the fixed charge in the gate oxide. Thus, the degradation of electrical characteristics of device is mainly dominated by the self-heating induced NBTI effect.
     In chapter 6, we investigate the asymmetric negative bias temperature instability degradation of poly-Si TFTs. Electric measurements of normal and reverse modes were employed to analyze the degradation on Vt, current, leakage current and sub-threshold swing (S.S.). The results indicated that a non-uniform vertical electric field at the poly-Si/SiO2 resulted in asymmetric negative bias temperature instability degradation. The trap generation was a grading distribution from source to drain. Moreover, some energy diagrams were proposed to explain the experimental data. Sequentially, asymmetric TFT degradation resulted from a grading distribution of trap state induced by asymmetric NBTI.
    Advisory Committee
  • Tzyy-Ming Cheng - chair
  • Ann-Kuo Chu - co-chair
  • Ming-Kwei Lee - co-chair
  • Cheng-Tung Huang - co-chair
  • Ting-Chang Chang - advisor
  • Files
  • etd-0623109-111336.pdf
  • indicate in-campus access immediately and off_campus access in a year
    Date of Submission 2009-06-23

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