Title page for etd-0614114-135024


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URN etd-0614114-135024
Author Chiang-Hsiang Liao
Author's Email Address No Public.
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Department Electrical Engineering
Year 2013
Semester 2
Degree Master
Type of Document
Language English
Title Development of A Rapid Readout System for CEA Detection and An SRAM with Leakage Sensor and Read Delay Compensation
Date of Defense 2014-06-25
Page Count 92
Keyword
  • leakage current sensor
  • SRAM
  • readout circuit
  • Abstract This thesis is composed of a biomedical sensing system design and a novel circuit
    design of 5T SRAM (static random access memory, SRAM). The first topic is a CEA (carcinoembryonic
    antigen, CEA) readout system development, while a static random access
    memory with leakage sensor and read delay compensation is the second.
    The first topic investigates a CEA measurement readout system. The core of this
    system is the readout circuit. By taking advantage of the characteristics that the resonant
    frequencies of the loaded FPW (flexural plate-wave, FPW) biosensor will shift, we can
    detect the maximum voltage of the various sine wave signals fed into the biosensors when
    the sine wave signal frequency meets the resonant frequency. The difference of the frequency
    change, which also indicates the concentration of the biosensor, can be estimated
    by a look-up table. The frequency shift of the biosensors can be readout in 10 minutes
    by physical measurement to attain the linearity R2 of 0.9772, and the maximum error of
    0.662 %.
    In the second topic, a 4+1 kb SRAM with leakage sensor and read delay compensation
    is demonstrated using 40 nm CMOS process, where single-ended 5T loadless SRAM cells are used. The energy per access is found to be 0.9411 pJ and the read delay is reduced 35.58% at the expense of 3.64% area overhead. The leakage sensor and compensation circuits are carried out by dummy SRAM cells to mimic the leakage currents therein. A warning signal will be sent and activates the compensation circuit to speed up the read access and lower the power consumption when the dummy SRAM cells are threatened by leakage currents.
    Advisory Committee
  • Yu-Cheng Lin - chair
  • Tzu-Chao Chuang - co-chair
  • Ko-Chi Kuo - co-chair
  • Chua-Chin Wang - advisor
  • Files
  • etd-0614114-135024.pdf
  • Indicate in-campus at 99 year and off-campus access at 99 year.
    Date of Submission 2014-07-14

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