Title page for etd-0610113-114950


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URN etd-0610113-114950
Author Yi-hong Wu
Author's Email Address m003010037@student.nsysu.edu.tw
Statistics This thesis had been viewed 5351 times. Download 49 times.
Department Electrical Engineering
Year 2012
Semester 2
Degree Master
Type of Document
Language zh-TW.Big5 Chinese
Title A 16-channel High-Voltage Stimulation Generator and A Pulse Frequency Modulation Boost Converter for Spinal Cord Stimulation Systems
Date of Defense 2013-06-27
Page Count 83
Keyword
  • stimulation waveform generator
  • current-limiting
  • minimum off time one-shot circuit
  • PFM boost converter
  • SCS
  • Abstract This thesis consists of two topics, i.e., a 16-channel high-voltage stimulation generator and a pulse frequency modulation (PFM) boost converter, which are mainly designed for spinal cord stimulation (SCS) system applications.
    The first topic presents a 16-channel high-voltage stimulation generator to enlarge the stimulation signal swing on high-impedance electrodes of the SCS systems. Particularly, a charge pump composed of 5 cascaded voltage doublers is used to boost the core voltage (2.5 V) to higher than 10 V for the SCS system requirement. A total of 16 stimulation waveform generators are included to drive 16 corresponding sets of electrodes, where each generator is composed of high-voltage operational amplifier and high-voltage analog switch. Compared with existing reports and commercial products, the proposed 16-channel high-voltage stimulation generator attains better flexibility and lower cost to meet the SCS system specifications. This design is realized using TSMC 0.25 µm CMOS high voltage mixed-signal based BCD 1P5M salicide 2.5/5/60 V technology.
    The second topic discloses a pulse frequency modulation (PFM) boost converter, particularly controlled by a current-limiting design and a minimum off time one-shot circuit. The boost converter is operated in a discontinuous conduction mode. The converter controlled by this PFM approach has higher efficiency, smaller output ripple, and better regulation. The converter is designed and simulated using TSMC 0.25 µm CMOS high voltage mixed-signal based BCD 1P5M salicide 2.5/5/60 V technology. Measurement results show that the converter can accommodate with an input voltage from 2.5 V to 4.2 V, and the boosted voltage is up to around 12.1 V. The output ripple is about 130 mV, and the efficiency is as high as 85%.
    Advisory Committee
  • Soon-Jyh Chang - chair
  • Shen-Fu Hsiao - co-chair
  • Jih-Ching Chiu - co-chair
  • Chua-Chin Wang - advisor
  • Files
  • etd-0610113-114950.pdf
  • Indicate in-campus at 5 year and off-campus access at 5 year.
    Date of Submission 2013-07-10

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