Title page for etd-0317106-151802


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URN etd-0317106-151802
Author Po-hsiang Chang
Author's Email Address No Public.
Statistics This thesis had been viewed 5572 times. Download 3636 times.
Department Computer Science and Engineering
Year 2005
Semester 2
Degree Master
Type of Document
Language zh-TW.Big5 Chinese
Title Enhanced 8-bit microcontroller and its SoC integration
Date of Defense 2005-07-25
Page Count 119
Keyword
  • Microcontroller
  • Operation enhancement
  • SoC integration
  • Abstract The word “3C products” means computation, communication and consumer electronics products. Particularly, consumer electronics products become one of the most important part of high technology industry. Recently, the properties of consumer electronics products tend to integrate powerful computation and communication abilities. Further more, the trend of more light, thin, short and small makes every kind of IC inside consumer electronics products highly integration. This tendency describe above brings embedded semiconductor providers a difficult problem. That is, we must improve the computation ability and function integration without increasing area overhead. 
    The proposed method of this thesis is adding computation enhanced instructions in original instruction set without change basic architecture of microprocessor. Further, make a better design choice after analyzing different implement ways and considering their trade off between performance and cost. The goal is producing a powerful microprocessor which is improved the most with the least overhead.
    There are two directions in the result of this thesis. One is pure enhancing microprocessor computation ability. About 54% special operation execution time is reduced by adding operation enhanced instructions, but only taken 10% area cost. However, if 6.35% system frequency speeddown is acceptable, about 59% special operation execution time could be reduced. The other is the phenomenon after integrating In-Circuit Emulator (ICE) in microprocessor. Apparently, integrating debug mechanism doesn’t change timing of whole system. However, it makes a great deal of circuit area overhead about 112%. This result shows that a system needs keep individual characters between microprocessor and ICE. A batter method of integrating ICE in system is using boundary scan cell in whole system.
    Advisory Committee
  • Yun-Nan Chang - chair
  • Jin-Hua Hong - co-chair
  • Jih-ching Chiu - co-chair
  • Ko-Chi Kuo - co-chair
  • Ing-Jer Huang - advisor
  • Files
  • etd-0317106-151802.pdf
  • indicate access worldwide
    Date of Submission 2006-03-17

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