|Author's Email Address
||This thesis had been viewed 5354 times. Download 216 times.|
||Computer Science and Engineering|
|Type of Document
||A Tool for Static WCET Analysis with Accurate Memory Modeling for ARM Programs that Use Scratchpad Memory|
|Date of Defense
||In order to guarantee the reliability of the real-time system, each process should be complete before the deadline. Therefore, providing accurate WCET for scheduler would be a key factor.|
WCET can derive by two method: measurement-base or static analysis. Since measurement-base cannot guarantee the safety of WCET, we use static analysis in this thesis.
In this thesis, we use SWEET (SWEdish execution time tool) to estimates WCET for ARM. Since the memory module of SWEET for ARM is out of date and cannot provide accurate WCET. Therefore, we propose a simplified architecture for analyzing the time costs of memory read accesses and memory write accesses. This method can not only derive the memory access time of DRAM but also SPM. Additionally, in order to prevent over-optimizing issue of allocator on WCET, we also provide a more efficient way to generate nearly worst case flow paths.
Experiment result shows our memory module can improve 43%~46% of WCET compares to the situation which assumed every memory access is worst.
||Chungnan Lee - chair|
Chun-Hung Lin - co-chair
Tong-Yu Hsieh - co-chair
Steve W.Haga - advisor
Indicate in-campus at 0 year and off-campus access at 2 year.|
|Date of Submission