Title page for etd-0026116-174014


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URN etd-0026116-174014
Author Pei-Ying Lai
Author's Email Address No Public.
Statistics This thesis had been viewed 5566 times. Download 361 times.
Department Electrical Engineering
Year 2015
Semester 1
Degree Master
Type of Document
Language zh-TW.Big5 Chinese
Title FPGA-Based Phase-Locked-Loop Frequency-Locking Algorithm for Ultrasonic Spray Coating System
Date of Defense 2016-01-05
Page Count 58
Keyword
  • FPGA
  • ultrasonic transducer
  • phase-locked-loop
  • Abstract A phase-locked-loop frequency-locking algorithm implemented on an FPGA is presented for an ultrasonic spray coating system. The algorithm generates a sine wave for driving the ultrasonic transducer and ensures the frequency of the sine wave to automatically follow the transducer resonance (or anti-resonance) frequency, thereby maximizing the conversion efficiency from electrical power to vibration power. By the observation, the transducer's impedance becomes purely resistive at its resonance (or anti-resonance). So a digital phase locked loop is employed to track the transducer resonance (or anti-resonance) by adjusting the driving frequency to where the driving voltage and current are in phase. The targeted driving frequencies range from 20 kHz to 80 kHz. The experiments performed on different transducers in the ultrasonic spray coating system confirm the effectiveness of the algorithm.
    Advisory Committee
  • Perng, Jau-Woei - chair
  • Jih-ching Chiu - co-chair
  • Shiang-Hwua Yu - advisor
  • Files
  • etd-0026116-174014.pdf
  • Indicate in-campus at 3 year and off-campus access at 3 year.
    Date of Submission 2016-01-28

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